M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 88

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
e
E
3
. v
J
2
Table 8.3 RD, WRL and WRH Signals
NOTES:
Table 8.4 RD, WR and BHE Signals
0
C
8.2.3 Read and Write Signals
1
9
8 /
0 .
B
________
When using a16-bit data bus, the PM02 bit in the PM0 register selects a combination of the "RD, WR and
BHE" signals or the "RD, WRL and WRH" signals to determine the read or write signal. When the DS3 to
DS0 bits in the DS register are set to "0" (8-bit data bus), set the PM02 bit to "0" (RD/WR/BHE). When
any of the DS3 to DS0 bits are set to "1" (16-bit data bus) to access an 8-bit space, the combination of
"RD, WR and BHE" is automatically selected regardless of the PM02 bit setting. Tables 8.3 and 8.4 list
each signal operation.
The RD, WR and BHE signals are combined for the read or write signal after reset.
When changing the combination of "RD, WRL and WRH", set the PM02 bit first to write data to an external
memory.
_____
0
Data Bus
1
4
1. The WR signal is used instead of the WRL signal.
Data Bus
0
16 Bits
8 Bits
16 Bits
G
3
J
8 Bits
6
u
_____
o r
______
0 -
. l
u
0
1
_____
_____
p
______
, 7
0
______
1
(
2
M
0
________
______
3
0
2
________
5
C
8 /
RD
________
H
H
H
H
Page 65
L
L
L
L
, 4
_____
RD
M
H
H
H
H
________
L
L
_________
3
2
________
C
8 /
f o
WR
4
H
H
H
H
L
L
L
L
4
) T
9
5
WRL
H
L
H
H
L
L
_________
(1)
(1)
_____ ________
Not used
Not used
BHE
H
H
L
L
L
L
_______
Not used
Not used
WRH
H
H
L
L
_________
H / L
H / L
A0
H
H
L
L
L
L
Read data
Write data to both even and odd addresses
Write 1-byte data to even address
Write 1-byte data to odd address
Write 1-byte data
Read 1-byte data
Write 1-byte data to odd address
Write 1-byte data
Read 1-byte data
Read 1-byte data from odd address
Write 1-byte data to even address
Read 1-byte data from even address
Read data from both even and odd addresses
Write data to both even and odd addresses
Status of External Data Bus
Status of External Data Bus
_____ ______ ________
_____
______
8. Bus