M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 112

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
e
E
3
. v
J
2
Figure 9.8 PM2 Register
0
C
1
9
8 /
0 .
B
0
1
4
0
G
3
J
6
u
Processor Mode Register 2
o r
b7
0 -
. l
NOTES:
u
0
1
p
b6
1. Rewrite the PM2 register after the PRC1 bit in the PRCR register is set to "1" (write enable).
2. Once the PM22 and PM21 bits are set to "1", they can not be set to "0" by program.
3. When the PM21 bit is set to "1",
4. When the PM22 bit is set to "1",
, 7
0
1
(
the CPU clock keeps running when the WAIT instruction is executed;
nothing is changed even if following bits are set to either "0" or "1".
the on-chip oscillator clock becomes a count source of the watchdog timer after the on-chip oscillator starts;
write to the CM10 bit is disabled (the microcomputer does not enter stop mode.);
the watchdog timer keeps running when the microcomputer is in wait mode and hold state.
2
M
b5
• the CM02 bit in the CM0 register (the peripheral function clock is not stopped in wait mode.)
• the CM05 bit in the CM0 register (the main clock is not stopped.)
• the CM07 bit in the CM0 register (a CPU clock source is not changed.)
• the CM10 bit in the CM1 register (the microcomputer does not enter stop mode.)
• the CM17 bit in the CM1 register (a CPU clock source is not changed.)
• the CM20 bit in the CM2 register (oscillation stop detect function settings are not changed.)
• all bits in the PLC0 and PLC1 registers (PLL frequency synthesizer function settings are not changed.)
0
3
0
b4
2
5
C
b3
0
8 /
Page 89
, 4
b2
M
b1
3
2
b0
0
C
8 /
f o
Symbol
4
PM21
PM22
PM24
PM25
PM26
PM27
4
(b0)
(b3)
) T
Bit
9
Symbol
PM2
5
Reserved Bit
System Clock Protect
Bit
WDT Count Source
Protect Bit
Reserved Bit
CPU Clock Select Bit 3
CAN Clock Select Bit
f
Select Bit
2n
(2, 3)
(1)
Count source
Bit Name
(2, 4)
Address
0013
16
b7
Set to "0"
0 : Protects the clock by a PRCR
1 : Disables a clock change
0 : Selects BCLK as count source of
1 : Selects the on-chip oscillator
0 : Clock selected by the CM07 bit
1 : Main Clock
0 : f
1 : Main Clock
0 0 : Peripheral function clock
0 1 : X
1 0 : On-chip oscillator clock
1 1 : Do not set to this value
Set to "0"
b6
the watchdog timer
clock as count source of the
watchdog timer
register setting
1
IN
clock
After Reset
00
Function
16
9. Clock Generation Circuit
RW
RW
RW
RW
RW
RW
RW
RW
RW