M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 45

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
3. Memory
e
E
3
. v
J
2
Figure 3.1 Memory Map
9 0
C
Figure 3.1 shows a memory map of the M32C/84 group (M32C/84, M32C/84T).
The M32C/84 group (M32C/84, M32C/84T) provides 16-Mbyte address space from addresses 000000
FFFFFF
The internal ROM is allocated lower addresses beginning with address FFFFFF
Kbyte internal ROM is allocated in addresses FF0000
The fixed interrupt vectors are allocated addresses FFFFDC
of each interrupt routine. Refer to 11. Interrupt for details.
The internal RAM is allocated higher addresses beginning with address 000400
Kbyte internal RAM is allocated addresses 000400
when the subroutine is called or an interrupt is acknowleged.
SFR, consisting of control registers for peripheral functions such as I/O port, A/D converter, serial I/O, and
timers, is allocated addresses 000000
cannot be accessed by users.
The special page vectors are allocated addresses FFFE00
tion and JSRS instruction. Refer to the Renesas publication M32C/80 Series Software Manual for details.
In memory expansion mode and microprocessor mode, some spaces are reserved and cannot be ac-
cessed by users.
. 1
8 /
B
1 0
0
4
3 0
G
J
- 6
. l u
o r
1 0
16
u
0
512 Kbytes
384 Kbytes
320 Kbytes
192 Kbytes
128 Kbytes
p
.
24 Kbytes
16 Kbytes
10 Kbytes
, 7
1 0
Capacity
Capacity
(
0 2
M
3
Internal ROM
Internal RAM
5 0
2
C
8 /
Page 22
, 4
YYYYYY
XXXXXX
FB0000
FD0000
FE0000
F80000
FA0000
002BFF
0063FF
0043FF
M
3
2
NOTES:
C
16
16
16
16
16
16
16
1. In memory expansion mode and microprocessor mode.
2. In memory expansion mode.
3. Additional 4-Kbyte space is provided in flash memory version for storing data.
4. This space can be used in single-chip mode and memory expansion mode.
5. Watchdog timer interrupts, oscillation stop detect interrupts,
8 /
16
16
f o
16
4
This space becomes external space in microprocessor mode.
This space can be used in single-chip mode and memory expansion mode.
This space becomes reserved space in microprocessor mode.
This space becomes external space in microprocessor mode.
and voltage down detect interrupts share vectors.
4
) T
5 9
000000
000400
0063FF
00F000
00FFFF
F00000
F80000
FFFFFF
16
16
16
16
16
16
16
16
to 0003FF
16
Reserved Space
Reserved Space
External Space
Internal ROM
(Data space)
Internal RAM
Internal ROM
16
SFR
to 002BFF
16
16
. All blank spaces within SFR are reserved and
to FFFFFF
16
(3)
(4)
16
to FFFFDB
(2)
(1)
to FFFFFF
16
. Besides storing data, it becomes stacks
16
FFFFDC
FFFE00
FFFFFF
.
16
. It is used for the JMPS instruc-
16
. It stores the starting address
16
16
16
Undefined Instruction
Watchdog Timer
BRK Instruction
Address Match
Special Page
Vector Table
16
16
Overflow
. For example, a 10-
. For example, a 64-
Reset
NMI
(5)
3. Memory
16
to