M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 13

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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26. Electrical Characteristics ____________________ 427
27. Precautions ________________________________ 468
A-8
25.2 Functions to Prevent the Flash Memory from Rewriting ................................. 398
25.3 CPU Rewrite Mode ............................................................................................... 400
25.4 Standard Serial I/O Mode ..................................................................................... 419
25.5 Parallel I/O Mode .................................................................................................. 426
26.1 Electrical Characteristics (M32C/84) ................................................................... 427
26.2 Electrical Characteristics (M32C/84T) ................................................................. 456
27.1 Restrictions to Use M32C/84T (High-Reliability Version) ................................. 468
27.2 Reset ..................................................................................................................... 469
27.3 Bus ........................................................................................................................ 470
27.4 SFR ........................................................................................................................ 471
27.5 Clock Generation Circuit ..................................................................................... 472
27.6 Protection ............................................................................................................. 476
25.2.1 ROM Code Protect Function ........................................................................ 398
25.2.2 ID Code Verify Function ............................................................................... 398
25.3.1 EW Mode 0 ..................................................................................................... 400
25.3.2 EW Mode 1 ..................................................................................................... 400
25.3.3 Flash Memory Control Register (FMR0 Register and FMR1 Register) .... 401
25.3.4 Precautions in CPU Rewrite Mode .............................................................. 407
25.3.5 Software Commands .................................................................................... 409
25.3.6 Data Protect Function ................................................................................... 415
25.3.7 Status Register (SRD Register) ................................................................... 415
25.3.8 Full Status Check .......................................................................................... 417
25.4.1 ID Code Verify Function ............................................................................... 419
25.4.2 Circuit Application in Standard Serial I/O Mode ........................................ 424
25.5.1 Boot ROM Area.............................................................................................. 426
25.5.2 ROM Code Protect Function ........................................................................ 426
27.3.1 HOLD Signal .................................................................................................. 470
27.3.2 External Bus .................................................................................................. 470
27.4.1 100-Pin Package ............................................................................................ 471
27.4.2 Register Settings .......................................................................................... 471
27.5.1 CPU Clock...................................................................................................... 472
27.5.2 Sub Clock ...................................................................................................... 472
27.5.3 PLL Frequency Synthesizer ......................................................................... 473
27.5.4 External Clock ............................................................................................... 473
27.5.5 Clock Divide Ratio ........................................................................................ 473
27.5.6 Power Consumption Control ....................................................................... 473
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