M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 505

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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27.9.3 Timer B
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27.9.3.1 Timer B (Timer Mode, Event Counter Mode)
27.9.3.2 Timer B (Pulse Period/Pulse Width Measurement Mode)
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• The TBiS (i=0 to 5) bit is set to "0" (stops counting) after reset. Set the TBiS bit to "1" (starts
• The TBi register indicates the counter value during counting at any given time. However, the
• The IR bit in the TBiIC (i=0 to 5) register is set to "1" (interrupt requested) when the valid edge of a
• Use another timer to count how often the timer counter overflows when an interrupt source cannot
• To set the MR3 bit in the TBiMR register to "0" (no overflow), set the TBiMR register after the MR3
• The IR bit in the TBiIC register is used to detect overflow only. Use the MR3 bit only to determine
• Indeterminate values are transferred to the reload register during the first valid edge input after
• The counter value is indeterminate when counting is started. Therefore, the MR3 bit setting may
• The IR bit may be set to "1" (interrupt requested) if the MR1 and MR0 bits in the TBiMR register are
• Pulse width measurement measures pulse width continuously. Use program to determine whether
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The TB2S to TB0S bits are bits 7 to 5 in the TABSR register. The TB5S to TB3S bits are bits 7 to 5
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counting) after selecting an operating mode and setting TBi register.
in the TBSR register.
counter is "FFFF
while the counter stops and before the counter starts counting.
pulse to be measured is input and when the timer Bi counter overflows. The MR3 bit in the TBiMR
register determines the interrupt source within an interrupt routine.
be determined by the MR3 bit, such as when a pulse to be measured is input at the same time the
timer counter overflows.
bit is set to "1" (overflow) and one or more cycles of the count source are counted, while the TBiS
bits in the TABSR and TBSR registers are set to "1" (starts counting).
interrupt source within an interrupt routine.
counting is started. Timer Bi interrupt request is not generated at this time.
change to "1" (overflow) and causes timer Bi interrupt requests to be generated until a valid edge is
input after counting is started.
set to a different value after a count begins. If the MR1 and MR0 bits are rewritten, but to the same
value as before, the IR bit remains unchanged.
measurement results are high ('"H") or low ("L").
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Page 482
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" when reloading. The setting value can be read after setting the TBi register
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27. Precautions (Timer)