M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 146

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
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3
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2
Figure 11.9 Interrupt Priority Level Select Circuit
0
C
1
9
Low
0 .
8 /
Hig
B
h
Peripheral Function Interrupt Priority
(if priority levels are the same)
0
1
4
0
3
G
J
6
u
Bus Conflict/Start, Stop Condition
Bus Conflict/Start, Stop Condition
o r
Each Interrupt Priority Level
0 -
. l
UART0 Transmission/NACK
UART1 Transmission/NACK
UART3 Transmission/NACK
u
0
1
UART0 Reception/ACK
UART1 Reception/ACK
Bus Conflict/Start, Stop
UART2 Transmission/
UART3 Reception/ACK
p
UART4 Transmission/
, 7
0
Condition(UART2)
UART2 Reception/
UART4 Reception/
(UART0, UART3)
(UART1, UART4)
1
(
2
M
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
Timer B3
Timer B4
Timer B5
0
DMA0
DMA1
DMA2
DMA3
NACK
INT5
INT4
INT3
INT2
INT1
INT0
0
3
NACK
ACK
ACK
5
2
C
8 /
Page 123
, 4
M
3
2
C
Level 0 (Initial Value)
f o
8 /
4
4
) T
9
5
NOTES:
Watchdog Timer, Oscillation Stop
Detection, Low Voltage Detection
1. Low voltage detection interrupt cannot be used in M32C/84T.
Each Interrupt Priority Level
Intelligent I/O Interrupt 10
Intelligent I/O Interrupt 3
Intelligent I/O Interrupt 4
Intelligent I/O Interrupt 8
Intelligent I/O Interrupt 9
Intelligent I/O Interrupt 0
Intelligent I/O Interrupt 1
Intelligent I/O Interrupt 2
RLVL2 to RLVL0 Bits
Key Input Interrupt
/CAN Interrupt 1
CAN Interrupt 2
/CAN Interrupt 0
Address Match
DMAC II
I Flag
A/D0
NMI
IPL
(1)
Interrupt request priority
detection results output
(to the clock generation
circuit)
Interrupt request
acknowledged
(to CPU)
11. Interrupts