M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 440

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
R
M
e
E
3
. v
J
2
Table 25.6 Errors and FMR0 Register State
NOTES:
0
C
1
25.3.8 Full Status Check
9
FMR07
(SR5)
0 .
B
8 /
If an error occurs when a program or erase operation is completed, the FMR07 and FMR06 bits in the
FMR0 register are set to "1", indicating a specific error. Therefore, execution results can be confirmed by
verifying these bits (full status check).
Table 25.6 lists errors and FMR0 register state. Figure 25.13 shows a flow chart of the full status check
and handling procedure for each error.
1. The flash memory enters read array mode when command code "xxFF
2. When the FMR02 bit is set to "1" (lock bit disabled), no error occurs even under the conditions above.
(SRD Register)
0
1
4
FMR0 Register
1
1
0
0
cycle of these commands. The command code written in the first bus cycle becomes invalid.
3
J
G
6
u
o r
0 -
. l
State
u
0
1
, 7
0
p
1
FMR06
(
2
(SR4)
M
0
0
3
1
0
1
5
2
C
8 /
Page 417
, 4
Command
sequence error • A value other than "xxD0
Erase error
Program error
M
3
2
Error
C
f o
8 /
4
4
) T
9
5
• An incorrect command is written
• The block erase command is executed on a locked block
• The block erase or erase all unlocked block command is ex-
• The program command is executed on locked blocks
• The program command is executed on an unlocked block, but the
• The lock bit program command is executed but the program op-
bus cycle of the lock bit program, block erase or erase all un-
locked block command
ecuted on an unlock block, but the erase operation is not com-
pleted as expected
program operation is not completed as expected
eration is not completed as expected
Error Occurrence Conditions
(1)
16
" or "xxFF
16
" is written in the second bus
16
" is written in the second
25. Flash Memory Version
(2)
(2)