M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 367

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
e
E
3
. v
J
2
Figure 23.18 C0MDR Register
0
C
23.1.16 CAN0 Mode Register (C0MDR Register)
1
9
0 .
8 /
B
0
1
23.1.16.1 CMOD Bit
4
The CMOD bit selects a CAN operating mode.
0
• Normal operating mode: The CAN module transmits and receives data successfully.
• Bus monitoring mode
• Self-test mode: The CAN module connects the CAN0
3
G
J
NOTES:
6
u
o r
0 -
. l
CAN0 Mode Register
b7
1. Do not generate a transmit request in bus monitoring mode.
u
0
1
NOTES:
p
, 7
0
The CAN module assumes the ACK bit is set to dominant "L" regardless of the ACK bit setting.
Therefore, when the CRC delimiter is received successfully, the CAN module determines the
data is received with no error regardless of the ACK bit setting.
b6
1
(
1. Set the C0MDR register when the STATE_RESET bit in the C0STR register is set to "1" (CAN
2. Value is obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) after
2
M
0
b5
module reset completed).
reset and supplying the clock to the CAN module.
3
0
2
5
b4
C
8 /
Page 344
b3
, 4
Output signal from the CAN0
transmitting data. Figure 23.19 shows an image diagram in self-test mode.
The CAN module can communicate without additional device in loop back mode.
b2
M
3
b1
2
C
(1)
b0
f o
8 /
: The CAN module receives data. Output signal from the CAN0
4
ule transmits neither ACK nor error frame.
4
fixed as a high-level ("H") signal in bus monitoring mode. The CAN mod
(b7 - b2)
Symbol
) T
CMOD
9
5
Bit
(1)
Symbol
C0MDR
CAN Operating Mode
Select Bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Bit Name
Address
0219
OUT
16
pin is fixed as an "H" signal in self-test mode while
OUT
b1 b0
0 0: Normal operating mode
0 1: Bus monitoring mode
1 0: Self-test mode
1 1: Do not set to this value
pin to the CAN0
After Reset
XXXX XX00
Function
(2)
2
IN
pin internally.
23. CAN Module
RW
RW
RW
OUT
pin is