M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 144

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30845FJGP#U3M30845FJGP
Manufacturer:
TI
Quantity:
18 562
Company:
Part Number:
M30845FJGP#U3
Manufacturer:
MIT
Quantity:
2 367
Company:
Part Number:
M30845FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30845FJGP#U3M30845FJGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
M30845FJGP#U3M30845FJGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
e
E
3
. v
J
2
Figure 11.7 Stack States
0
C
11.6.6 Saving a Register
11.6.7 Restoration from Interrupt Routine
1
9
0 .
8 /
B
In the interrupt sequence, the FLG register and PC are saved to the stack.
After the FLG register is saved to the stack, 16 high-order bits and 16 low-order bits of PC, extended to 32
bits, are saved to the stack. Figure 11.7 shows stack states before and after an interrupt request is
acknowledged.
Other important registers are saved by program at the beginning of an interrupt routine. The PUSHM
instruction can save several registers
Refer to 11.4 High-Speed Interrupt for the high-speed interrupt.
NOTES:
When the REIT instruction is executed at the end of an interrupt routine, the FLG register and PC before the
interrupt sequence is performed, which have been saved to the stack, are automatically restored. The pro-
gram, executed before an interrupt request was acknowledged, starts running again. Refer to 11.4 High-
Speed Interrupt for the high-speed interrupt.
Restore registers saved by program in an interrupt routine by the POPM instruction or others before the
REIT and FREIT instructions. Register bank is switched back to the bank used prior to the interrupt
sequence by the REIT or FREIT instruction.
Stack state before an interrupt request is acknowledged
0
1
4
0
Address
1. Can be selected from the R0, R1, R2, R3, A0, A1, SB and FB registers.
3
G
J
6
u
o r
0 -
. l
m-6
m-5
m–4
m–3
m–2
m–1
m
m+1
u
0
1
p
, 7
0
MSB
1
(
2
M
0
0
3
5
2
Content of
previous stack
Content of
previous stack
C
The Stack
8 /
Page 121
, 4
M
3
2
C
f o
8 /
4
4
) T
9
5
LSB
(1)
[SP]
SP value before
an interrupt is
generated
in the register bank used.
Stack state after an interrupt request is acknowledged
Address
m-6
m-5
m–4
m–3
m–2
m–1
m
m+1
MSB
Content of
previous stack
Content of
previous stack
The Stack
FLG
PC
PC
FLG
PC
00
16
M
L
H
L
H
LSB
[SP]
New SP value
11. Interrupts