DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 108

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 2 CPU
Table 2.14 Effective Address Calculation for Transfer and Operation Instructions
Rev.1.00 Sep. 08, 2005 Page 58 of 966
REJ09B0219-0100
No.
1
2
3
4
5
6
7
Immediate
Register direct
Register indirect
Register indirect with 16-bit displacement
Register indirect with 32-bit displacement
Index register indirect with 16-bit displacement
Index register indirect with 32-bit displacement
Register indirect with post-increment or post-decrement
Register indirect with pre-increment or pre-decrement
8-bit absolute address
16-bit absolute address
32-bit absolute address
Addressing Mode and Instruction Format
op
op
op
op
op
op
op
op
op
op
op
op
disp
disp
aa
rm
r
r
r
r
r
r
r
IMM
aa
rn
disp
disp
aa
Effective Address Calculation
31
31
31
31
31
31
31
31
31
31
31
31
31
Contents of general register (RL, R, or ER)
Contents of general register (RL, R, or ER)
Sign extension
Sign extension
Sign extension
Zero extension
Zero extension
General register contents
General register contents
General register contents
General register contents
General register contents
SBR
disp
disp
aa
15
15
15
disp
disp
aa
7
1, 2, or 4
1, 2, or 4
aa
1, 2, or 4
1, 2, or 4
0
0
0
0
0
0
0
0
0
0
0
0
0
×
×
+
+
+
+
±
±
31
31
31
31
31
31
31
31
31
31
Effective Address (EA)
0
0
0
0
0
0
0
0
0
0