DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 335

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2)
In burst mode, one byte, one word, or one longword of data continues to be transferred until the
transfer end condition is satisfied.
When a burst transfer starts, a transfer request from a channel having priority is suspended until
the burst transfer is completed.
In figure 7.27, the TEND signal output is enabled and data is transferred in words from the
external 16-bit 2-state access space to the external 16-bit 2-state access space in normal transfer
mode by burst access.
B
Address bus
RD
LHWR, LLWR
TEND
Normal Transfer Mode (Burst Mode)
Figure 7.27 Example of Transfer in Normal Transfer Mode by Burst Access
Bus
released
DMA read cycle
DMA write cycle
DMA read cycle
Burst transfer
DMA write cycle DMA read cycle
Rev.1.00 Sep. 08, 2005 Page 285 of 966
Section 7 DMA Controller (DMAC)
Last transfer cycle
DMA write cycle
REJ09B0219-0100
Bus
released