DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 303

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 7.3
[Legend]
×: Don't care
SARA4 to
SARA0 or
DARA4 to
DARA0
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
111××
Extended Repeat Area
Not specified
2 bytes specified as extended repeat area by the lower 1 bit of the address
4 bytes specified as extended repeat area by the lower 2 bits of the address
8 bytes specified as extended repeat area by the lower 3 bits of the address
16 bytes specified as extended repeat area by the lower 4 bits of the address
32 bytes specified as extended repeat area by the lower 5 bits of the address
64 bytes specified as extended repeat area by the lower 6 bits of the address
128 bytes specified as extended repeat area by the lower 7 bits of the address
256 bytes specified as extended repeat area by the lower 8 bits of the address
512 bytes specified as extended repeat area by the lower 9 bits of the address
1 kbyte specified as extended repeat area by the lower 10 bits of the address
2 kbytes specified as extended repeat area by the lower 11 bits of the address
4 kbytes specified as extended repeat area by the lower 12 bits of the address
8 kbytes specified as extended repeat area by the lower 13 bits of the address
16 kbytes specified as extended repeat area by the lower 14 bits of the address
32 kbytes specified as extended repeat area by the lower 15 bits of the address
64 kbytes specified as extended repeat area by the lower 16 bits of the address
128 kbytes specified as extended repeat area by the lower 17 bits of the address
256 kbytes specified as extended repeat area by the lower 18 bits of the address
512 kbytes specified as extended repeat area by the lower 19 bits of the address
1 Mbyte specified as extended repeat area by the lower 20 bits of the address
2 Mbytes specified as extended repeat area by the lower 21 bits of the address
4 Mbytes specified as extended repeat area by the lower 22 bits of the address
8 Mbytes specified as extended repeat area by the lower 23 bits of the address
16 Mbytes specified as extended repeat area by the lower 24 bits of the address
32 Mbytes specified as extended repeat area by the lower 25 bits of the address
64 Mbytes specified as extended repeat area by the lower 26 bits of the address
128 Mbytes specified as extended repeat area by the lower 27 bits of the address
Setting prohibited
Settings and Areas of Extended Repeat Area
Rev.1.00 Sep. 08, 2005 Page 253 of 966
Section 7 DMA Controller (DMAC)
REJ09B0219-0100