DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 402

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 I/O Ports
9.1.6
ODR is an 8-bit readable/writable register that selects the open-drain output function.
If a bit in ODR is set to 1, the pin corresponding to that bit in ODR functions as an NMOS open-
drain output. If a bit in ODR is cleared to 0, the pin corresponding to that bit in ODR functions as
a CMOS output.
The initial value of ODR is H'00.
9.2
This section describes the output priority of each pin.
The name of each peripheral module pin is followed by "_OE". This (for example: TIOCA4_OE)
indicates whether the output of the corresponding function is valid (1) or if another setting is
specified (0). Table 9.5 lists each port output signal's valid setting. For details on the
corresponding output signals, see the register description of each peripheral module. If the name
of each peripheral module pin is followed by A or B, the pin function can be modified by the port
function control register (PFCR). For details, see section 9.3, Port Function Controller.
For a pin whose initial value changes according to the activation mode, "Initial value E" indicates
the initial value when the LSI is started up in external extended mode and "Initial value S"
indicates the initial value when the LSI is started in single-chip mode.
Rev.1.00 Sep. 08, 2005 Page 352 of 966
REJ09B0219-0100
Note: The lower five bits are valid and the upper three bits are reserved for port F registers.
Bit
Bit Name
Initial Value
R/W
Open-Drain Control Register (PnODR) (n = 2 and F)
Output Buffer Control
Pn7ODR
R/W
7
0
Pn6ODR
R/W
6
0
Pn5ODR
R/W
5
0
Pn4ODR
R/W
4
0
Pn3ODR
R/W
3
0
Pn2ODR
R/W
2
0
Pn1ODR
R/W
1
0
Pn0ODR
R/W
0
0