DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 760

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 16 I
16.3.3
ICMR selects MSB first or LSB first, controls the master mode wait and selects the number of
transfer bits.
Rev.1.00 Sep. 08, 2005 Page 710 of 966
REJ09B0219-0100
Bit
7
6
5
4
3
Bit
Bit Name
Initial Value
R/W
I
Bit Name

WAIT


BCWP
2
2
C Bus Mode Register (ICMR)
C Bus Interface2 (IIC2)
R/W
7
0
Initial
Value
0
0
1
1
1
WAIT
R/W
6
0
R/W
R/W
R/W


R/W
5
1
Description
Reserved
The write value should always be 0.
Wait Insertion
This bit selects whether to insert a wait after data
transfer except for the acknowledge bit. When this bit is
set to 1, after the falling of the clock for the last data bit,
the low period is extended for two transfer clocks.
When this bit is cleared to 0, data and the acknowledge
bit are transferred consecutively with no waits inserted.
The setting of this bit is invalid in slave mode.
Reserved
These bits are always read as 1.
BC Write Protect
This bit controls the modification of the BC2 to BC0
bits. When modifying, this bit should be cleared to 0
and the MOV instruction should be used.
0: When writing, the values of BC2 to BC0 are set
1: When reading, 1 is always read
When writing, the settings of BC2 to BC0 are invalid.
4
1
BCWP
R/W
3
1
BC2
R/W
2
0
BC1
R/W
1
0
BC0
R/W
0
0