DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 501

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1)
Figure 10.20 shows an example of the PWM mode setting procedure.
(2)
Figure 10.21 shows an example of PWM mode 1 operation.
In this example, TGRA compare match is set as the TCNT clearing source, 0 is set for the TGRA
initial output value and output value, and 1 is set as the TGRB output value.
In this case, the value set in TGRA is used as the cycle, and the value set in TGRB register as the
duty cycle.
Example of PWM Mode Setting Procedure
Examples of PWM Mode Operation
TGRA
TGRB
H'0000
TIOCA
Select counter clearing source
Select waveform output level
TCNT value
Select counter clock
Set PWM mode
Figure 10.20 Example of PWM Mode Setting Procedure
<PWM mode>
PWM mode
Start count
Figure 10.21 Example of PWM Mode Operation (1)
Set TGR
[1]
[2]
[3]
[4]
[5]
[6]
Counter cleared by
TGRA compare match
[1] Select the counter clock with bits TPSC2 to
[2] Use bits CCLR2 to CCLR0 in TCR to select the
[3] Use TIOR to designate TGR as an output
[4] Set the cycle in TGR selected in [2], and set the
[5] Select the PWM mode with bits MD3 to MD0 in
[6] Set the CST bit in TSTR to 1 to start the count
TPSC0 in TCR. At the same time, select the
input clock edge with bits CKEG1 and CKEG0 in
TCR.
TGR to be used as the TCNT clearing source.
compare register, and select the initial value and
output value.
duty in the other TGRs.
TMDR.
operation.
Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.1.00 Sep. 08, 2005 Page 451 of 966
REJ09B0219-0100
Time