DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 651
DF61654N50FTV
Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.DF61653N50FTV.pdf
(1020 pages)
Specifications of DF61654N50FTV
Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Figure 14.16 Sample Multiprocessor Serial Reception Flowchart (1)
No
No
No
Read ORER and FER flags in SSR
Read ORER and FER flags in SSR
Read receive data in RDR
Read receive data in RDR
Set MPIE bit in SCR to 1
Clear RE bit in SCR to 0
Read RDRF flag in SSR
Read RDRF flag in SSR
All data received?
FER ∨ ORER = 1
FER ∨ ORER = 1
This station’s ID?
Start reception
Initialization
RDRF = 1
RDRF = 1
<End>
Yes
Yes
Yes
Yes
No
No
Yes
No
Error processing
Yes
Section 14 Serial Communication Interface (SCI, IrDA, CRC)
(Continued on
[3]
[1]
[2]
next page)
[4]
[5]
[1] SCI initialization:
[2] ID reception cycle:
[3] SCI state check, ID reception and
[4] SCI state check and data reception:
[5] Receive error processing and break
The RxD pin is automatically designated
as the receive data input pin.
Set the MPIE bit in SCR to 1.
comparison:
Read SSR and check that the RDRF
flag is set to 1, then read the receive
data in RDR and compare it with this
station’s ID. If the data is not this
station’s ID, set the MPIE bit to 1 again,
and clear the RDRF flag to 0. If the data
is this station’s ID, clear the RDRF flag
to 0.
Read SSR and check that the RDRF
flag is set to 1, then read the data in
RDR.
detection:
If a receive error occurs, read the ORER
and FER flags in SSR to identify the
error. After performing the appropriate
error processing, ensure that the ORER
and FER flags are both cleared to 0.
Reception cannot be resumed if either
of these flags is set to 1. In the case of a
framing error, a break can be detected
by reading the RxD pin value.
Rev.1.00 Sep. 08, 2005 Page 601 of 966
REJ09B0219-0100
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