DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 192

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
6.2.7
BCR1 is used for selection of the external bus released state protocol, enabling/disabling of the
write data buffer function, and enabling/disabling of the WAIT pin input.
Rev.1.00 Sep. 08, 2005 Page 142 of 966
REJ09B0219-0100
Bit
15
14
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit Name
BRLE
BREQOE
Bus Control Register 1 (BCR1)
BRLE
DKC
R/W
R/W
15
0
7
0
BREQOE
0
Initial
Value
0
R/W
R/W
14
0
6
0
R/W
R/W
R/W
13
R
R
0
5
0
Description
External Bus Release Enable
Enables/disables external bus release.
0: External bus release disabled
1: External bus release enabled*
For details, see section 9, I/O Ports.
BREQO Pin Enable
Controls outputting the bus request signal (BREQO) to
the external bus master in the external bus released
state when an internal bus master performs an
external address space access.
0: BREQO output disabled
1: BREQO output enabled
BREQO pin can be used as I/O port
BREQ, BACK, and BREQO pins can be used as I/O
ports
12
R
R
0
4
0
R/W
11
R
3
0
0
R/W
10
R
0
2
0
WDBE
R/W
R
9
0
1
0
WAITE
R/W
R
8
0
0
0