DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 239

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.7.5
The bus cycle can be extended for the byte control SRAM interface by inserting wait cycles (Tw)
in the same way as the basic bus interface.
(1)
From 0 to 7 wait cycles can be inserted automatically between T2 cycle and T3 cycle for the 3-
state access space in area units, according to the settings in WTCRA and WTCRB.
(2)
For 3-state access space, when the WAITE bit in BCR1 is set to 1, the corresponding DDR bit is
cleared to 0, and the ICR bit is set to 1, wait input by means of the WAIT pin is enabled. For
details on DDR and ICR, refer to section 9, I/O ports.
Figure 6.26 shows an example of wait cycle insertion timing.
Program Wait Insertion
Pin Wait Insertion
Wait Control
Rev.1.00 Sep. 08, 2005 Page 189 of 966
Section 6 Bus Controller (BSC)
REJ09B0219-0100