DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 511

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.5
There are three kinds of TPU interrupt sources: TGR input capture/compare match, TCNT
overflow, and TCNT underflow. Each interrupt source has its own status flag and enable/disable
bit, allowing generation of interrupt request signals to be enabled or disabled individually.
When an interrupt request is generated, the corresponding status flag in TSR is set to 1. If the
corresponding enable/disable bit in TIER is set to 1 at this time, an interrupt is requested. The
interrupt request is cleared by clearing the status flag to 0.
Relative channel priority levels can be changed by the interrupt controller, but the priority within a
channel is fixed. For details, see section 5, Interrupt Controller.
Table 10.37 lists the TPU interrupt sources.
Table 10.37 TPU Interrupts
Channel
0
1
2
3
Interrupt Sources
Name
TGI0A
TGI0B
TGI0C
TGI0D
TCI0V
TGI1A
TGI1B
TCI1V
TCI1U
TGI2A
TGI2B
TCI2V
TCI2U
TGI3A
TGI3B
TGI3C
TGI3D
TCI3V
Interrupt Source
TGRA_0 input capture/compare match TGFA_0
TGRB_0 input capture/compare match TGFB_0
TGRC_0 input capture/compare match TGFC_0
TGRD_0 input capture/compare match TGFD_0
TCNT_0 overflow
TGRA_1 input capture/compare match TGFA_1
TGRB_1 input capture/compare match TGFB_1
TCNT_1 overflow
TCNT_1 underflow
TGRA_2 compare match
TGRB_2 compare match
TCNT_2 overflow
TCNT_2 underflow
TGRA_3 input capture/compare match TGFA_3
TGRB_3 input capture/compare match TGFB_3
TGRC_3 input capture/compare match TGFC_3
TGRD_3 input capture/compare match TGFD_3
TCNT_3 overflow
Interrupt Flag
TCFV_0
TCFV_1
TCFU_1
TGFA_2
TGFB_2
TCFV_2
TCFU_2
TCFV_3
Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.1.00 Sep. 08, 2005 Page 461 of 966
DTC
Activation
O
O
O
O
O
O
O
O
O
O
O
O
REJ09B0219-0100
DMAC
Activation
O
O
O
O

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