DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 146

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 5 Interrupt Controller
5.3.5
ISCRH and ISCRL select the source that generates an interrupt request on pins IRQ11 to IRQ0.
Upon changing the setting of ISCR, IRQnF (n = 0 to 11) in ISR is often set to 1 accidentally
through an internal operation. In this case, an interrupt exception handling is executed if an IRQn
interrupt request is enabled. In order to prevent such an accidental interrupt from occurring, the
setting of ISCR should be changed while the IRQn interrupt is disabled, and then the IRQnF in
ISR should be cleared to 0.
• ISCRH
Rev.1.00 Sep. 08, 2005 Page 96 of 966
REJ09B0219-0100
Bit
4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
IRQ Sense Control Registers H and L (ISCRH, ISCRL)
Bit Name
IRQ4E
IRQ3E
IRQ2E
IRQ1E
IRQ0E
IRQ11SR
R/W
R/W
15
0
7
0
Initial
Value
0
0
0
0
0
IRQ11SF
R/W
R/W
14
0
6
0
R/W
R/W
R/W
R/W
R/W
R/W
IRQ10SR
R/W
R/W
13
0
5
0
Description
IRQ4 Enable
The IRQ4 interrupt request is enabled when this bit is 1.
IRQ3 Enable
The IRQ3 interrupt request is enabled when this bit is 1.
IRQ2 Enable
The IRQ2 interrupt request is enabled when this bit is 1.
IRQ1 Enable
The IRQ1 interrupt request is enabled when this bit is 1.
IRQ0 Enable
The IRQ0 interrupt request is enabled when this bit is 1.
IRQ10SF
R/W
R/W
12
0
4
0
IRQ9SR
R/W
R/W
11
0
3
0
IRQ9SF
R/W
R/W
10
0
2
0
IRQ8SR
R/W
R/W
9
0
1
0
IRQ8SF
R/W
R/W
8
0
0
0