DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 297

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note:
Bit
2
1
0
*
Bit Name
DMAP2
DMAP1
DMAP0
Only 0 can be written to, to clear the flag.
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
DMA Priority Level 2 to 0
Select the priority level of the DMAC when using the
CPU priority control function over DTC and DMAC.
When the CPU has priority over the DMAC, the DMAC
masks a transfer request and waits for the timing when
the CPU priority becomes lower than the DMAC priority.
The priority levels can be set to the individual channels.
This bit is valid when the CPUPCE bit in CPUPCR is set
to 1.
000: Priority level 0 (low)
001: Priority level 1
010: Priority level 2
011: Priority level 3
100: Priority level 4
101: Priority level 5
110: Priority level 6
111: Priority level 7 (high)
Rev.1.00 Sep. 08, 2005 Page 247 of 966
Section 7 DMA Controller (DMAC)
REJ09B0219-0100