DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 155

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.5
Table 5.2 lists interrupt exception handling sources, vector address offsets, and interrupt priority.
In the default priority order, a lower vector number corresponds to a higher priority. When
interrupt control mode 2 is set, priority levels can be changed by setting the IPR contents. The
priority for interrupt sources allocated to the same level in IPR follows the default priority, that is,
they are fixed.
Table 5.2
Classification
External pin
SLEEP
instruction
External pin

WDT
Interrupt Exception Handling Vector Table
Interrupt Sources, Vector Address Offsets, and Interrupt Priority
Interrupt Source
NMI
Sleep interrupt
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
Reserved for
system use
WOVI
Vector
Number
7
18
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
Vector
Address
Offset*
H'001C
H'0048
H'0100
H'0104
H'0108
H'010C
H'0110
H'0114
H'0118
H'011C
H'0120
H'0124
H'0128
H'012C
H'0130
H'0134
H'0138
H'013C
H'0140
H'0144
IPR


IPRA14 to IPRA12
IPRA10 to IPRA8
IPRA6 to IPRA4
IPRA2 to IPRA0
IPRB14 to IPRB12
IPRB10 to IPRB8
IPRB6 to IPRB4
IPRB2 to IPRB0
IPRC14 to IPRC12
IPRC10 to IPRC8
IPRC6 to IPRC4
IPRC2 to IPRC0

IPRE10 to IPRE8
Rev.1.00 Sep. 08, 2005 Page 105 of 966
Priority
High
Low
Section 5 Interrupt Controller
DTC
Activation


O
O
O
O
O
O
O
O
O
O
O
O






REJ09B0219-0100
DMAC
Activation



















