DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 492

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
(2)
Figure 10.11 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 3 to
5, TGRB_3 compare match has been set as the channel 3 counter clearing source, and
synchronous clearing has been set for the channel 4 and 5 counter clearing source.
Three-phase PWM waveforms are output from pins TIOCA3, TIOCA4, and TIOCA5. At this
time, synchronous presetting and synchronous clearing by TGRB_3 compare match are performed
for channel 3 to 5 TCNT counters, and the data set in TGRB_3 is used as the PWM cycle.
For details on PWM modes, see section 10.4.5, PWM Modes.
Rev.1.00 Sep. 08, 2005 Page 442 of 966
REJ09B0219-0100
Example of Synchronous Operation
TGRB_3
TGRB_4
TGRA_3
TGRB_5
TGRA_4
TGRA_5
H'0000
TIOCA3
TIOCA4
TIOCA5
TCNT_3 to TCNT_5 values
Figure 10.11 Example of Synchronous Operation
Synchronous clearing by TGRB_3 compare match
Time