DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 734

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 15 USB Function Module (USB)
(3)
The application first analyzes command data from the host in the setup stage, and determines the
subsequent data stage direction. If the result of command data analysis is that the data stage is out-
transfer, the application waits for data from the host, and after data is received (EP0oTS bit in
IFR0 = 1), reads data from the FIFO. Next, the application writes 1 to the EP0o read complete bit,
empties the receive FIFO, and waits for reception of the next data.
The end of the data stage is identified when the host transmits an IN token and the status stage is
entered.
Rev.1.00 Sep. 08, 2005 Page 684 of 966
REJ09B0219-0100
Data Stage (Control-Out)
Data reception from host
OUT token reception
OUT token reception
(IFR0.EP0o TS = 1)
Set EP0o reception
Figure 15.12 Data Stage (Control-Out) Operation
to TRG.EP0o
USB function
to TRG.EP0s
complete flag
1 written
1 written
RDFN?
RDFN?
Yes
Yes
ACK
NACK
NACK
No
Interrupt request
No
receive data size register
data register (EPDR0o)
(TRG.EP0o RDFN = 1)
Clear EP0o reception
Read data from EP0o
Read data from EP0o
Write 1 to EP0o read
(IFR0.EP0o TS = 0)
complete flag
complete bit
(EPSZ0o)
Application

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