DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 921

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 Power-Down Modes
22.8
Sleep Interrupt Function
A sleep interrupt is generated by executing a SLEEP instruction. The sleep interrupt is non-
maskable, and is always accepted regardless of the interrupt control mode or the settings of the
CPU interrupt mask bits.
When SLPIE bit is set to 0, the sleep interrupt function is disabled. In this case, if a SLEEP
instruction is executed, the CPU transitions to the power-down state. When the power-down state
is canceled by an exception handling request, the CPU starts the exception handling. When SLPIE
bit is set to 1, the sleep interrupt function is enabled. In this case, if a SLEEP instruction is
executed, a transition to the power-down state is prevented by a sleep interrupt request and the
CPU immediately starts the exception handling.
When a SLEEP instruction is executed while the SLPIE bit is cleared to 0, a transition is made to
the power-down state. The power-down state is canceled by a canceling factor interrupt (see figure
22.5).
When a canceling factor interrupt is generated immediately before a SLEEP instruction is
executed, the exception handling starts. After returning from the interrupt handling, the SLEEP
instruction is executed to transition to the power-down state. In this case, the power-down state is
not canceled until the next canceling factor interrupt is generated (see figure 22.6).
When the SLPIE bit is set to 1 to enable the sleep interrupt function in the handling routine of
canceling factor interrupt, the operation of the system is as shown in figure 22.7. Even if a
canceling factor interrupt is generated immediately before a SLEEP instruction is executed, the
SLEEP instruction is executed and a sleep interrupt is generated. Therefore, a shift is made to the
CPU execution state after the exception handling, without shifting to the power-down state.
When the SLPIE bit is set to 1 to enable the sleep interrupt function, clear the SSBY bit in
SBYCR to 0.
Rev.1.00 Sep. 08, 2005 Page 871 of 966
REJ09B0219-0100