DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 304

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 7 DMA Controller (DMAC)
7.3.8
DMRSR is an 8-bit readable/writable register that specifies the on-chip module interrupt source.
The vector number of the interrupt source is specified in eight bits. However, 0 is regarded as no
interrupt source. For the vector numbers of the interrupt sources, refer to table 7.5.
7.4
Table 7.4 shows the DMAC transfer modes. The transfer modes can be specified to the individual
channels.
Table 7.4
Rev.1.00 Sep. 08, 2005 Page 254 of 966
REJ09B0219-0100
Address
Mode
Dual
address
Single
address
Bit
Bit Name
Initial Value
R/W
DMA Module Request Select Register (DMRSR)
Transfer Modes
Transfer mode
•
•
•
Repeat or block size
= 1 to 65,536 bytes,
1 to 65,536 words, or
1 to 65,536
longwords
•
•
•
Transfer Modes
Normal transfer
Repeat transfer
Block transfer
Instead of specifying the source or destination address
registers, data is directly transferred from/to the external
device using the DACK pin
The same settings as above are available other than address
register setting (e.g., above transfer modes can be specified)
One transfer can be performed in one bus cycle (the types of
transfer modes are the same as those of dual address modes)
R/W
7
0
R/W
6
0
Activation Source
•
•
•
Auto request
(activated by
CPU)
On-chip module
interrupt
External request
R/W
5
0
R/W
4
0
Common Function
•
•
•
R/W
3
0
Total transfer
size: 1 to 4
Gbytes or not
specified
Offset addition
Extended repeat
area function
R/W
2
0
Address Register
Source
DSAR
DSAR/
DACK
R/W
1
0
R/W
Destina-
tion
DDAR
DACK/
DDAR
0
0