DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 865

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 20.19 shows an example of the procedure to program the tuned data in block EB0 of the
user MAT.
1. After tuning program data is completed, clear the RAMS bit in RAMER to 0 to cancel the
2. Transfer the user-created procedure program to the on-chip RAM.
3. Start the procedure program and download the on-chip program to the on-chip RAM. The start
4. When block EB0 of the user MAT has not been erased, the programming program must be
Note: Setting the RAMS bit to 1 makes all the blocks of the user MAT enter the
overlaid RAM.
address of the download destination should be specified by FTDAR so that the tuned data area
does not overlay the download area.
downloaded after block EB0 is erased. Specify the tuned data saved in the FMPAR and
FMPDR parameters and then execute programming.
programming/erasing protection state (emulation protection state) regardless of the setting
of the RAM2 to RAM0 bits. Under this condition, the on-chip program cannot be
downloaded. When data is to be actually programmed and erased, clear the RAMS bit
to 0.
H'00000
H'01000
H'02000
H'03000
H'04000
H'05000
H'06000
H'07000
H'08000
H'5FFFF
Notes: 1. EB8 to EB15 in the H8SX/1654.
*
2
2. H'7FFFF in the H8SX/1654.
EB8 to EB13*
Flash memory
Figure 20.19 Programming Tuned Data (H8SX/1653)
user MAT
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
1
(1) Exit RAM emulation mode.
(2) Transfer user-created programming/erasing
(3) Download the on-chip programming/erasing
(4) Program after erasing, if necessary.
Area for programming/
Tuned data area
erasing program etc.
Download area
procedure program.
program to the area specified by FTDAR.
FTDAR setting should avoid the tuned data area.
Section 20 Flash Memory (0.18-µm F-ZTAT Version)
Specified by FTDAR
H'FFA000
H'FFAFFF
H'FFB000
H'FFBFFF
Rev.1.00 Sep. 08, 2005 Page 815 of 966
REJ09B0219-0100