DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 494

IC H8SX/1654 MCU FLASH 120TQFP

DF61654N50FTV

Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61654N50FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 16-Bit Timer Pulse Unit (TPU)
• When TGR is an input capture register
(1)
Figure 10.14 shows an example of the buffer operation setting procedure.
Rev.1.00 Sep. 08, 2005 Page 444 of 966
REJ09B0219-0100
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in TGR is transferred to the buffer register.
This operation is illustrated in figure 10.13.
Example of Buffer Operation Setting Procedure
Buffer register
Input capture
signal
Figure 10.14 Example of Buffer Operation Setting Procedure
Select TGR function
Set buffer operation
<Buffer operation>
Buffer operation
Start count
Figure 10.13 Input Capture Buffer Operation
[1]
[2]
[3]
Timer general
[1] Designate TGR as an input capture register or
[2] Designate TGR for buffer operation with bits
[3] Set the CST bit in TSTR to 1 to start the count
register
output compare register by means of TIOR.
BFA and BFB in TMDR.
operation.
TCNT

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