DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 116

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
2.7.9
Table 2.13 indicates how effective addresses are calculated in each addressing mode. In normal
mode the upper 8 bits of the effective address are ignored in order to generate a 16-bit address.
Table 2.13 Effective Address Calculation
Rev.7.00 Dec. 24, 2008 Page 62 of 698
REJ09B0074-0700
Register indirect with post-increment or
pre-decrement
•Register indirect with post-increment @ERn+
•Register indirect with pre-decrement @-ERn
Register direct (Rn)
Register indirect (@ERn)
Addressing Mode and Instruction Format
Effective Address Calculation
Operand Size
Byte
Word
Longword
Sign extension
Effective Address Calculation
General register contents
General register contents
General register contents
General register contents
1, 2, or 4
1, 2, or 4
Operand is general register contents.
Effective Address (EA)

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