DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 334

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

Table 9.3
Notes: 1. Synchronous operation setting is performed by setting the SYNC bit in TSYR to 1.
Table 9.4
Notes: 1. Synchronous operation setting is performed by setting the SYNC bit in TSYR to 1.
Rev.7.00 Dec. 24, 2008 Page 280 of 698
REJ09B0074-0700
Channel
0
Channel
1, 2
2. When TGRC or TGRD is used as a buffer register. TCNT is not cleared because the
2. Bit 7 is reserved in channels 1 and 2. It is always read as 0 and cannot be modified.
buffer register setting has priority, and compare match/input capture dose not occur.
CCLR2 to CCLR0 (channel 0)
CCLR2 to CCLR0 (channels 1 and 2)
Bit 7
CCLR2
0
1
Bit 7
Reserved*
0
2
Bit 6
CCLR1
0
1
0
1
Bit 6
CCLR1
0
1
Bit 5
0
1
0
1
0
1
0
1
Bit 5
0
1
0
1
CCLR0
CCLR0
TCNT clearing disabled
TCNT cleared by TGRA compare
match/input capture
TCNT cleared by TGRB compare
match/input capture
TCNT cleared by counter clearing for
another channel performing synchronous
clearing/synchronous operation*
TCNT clearing disabled
TCNT cleared by TGRC compare
match/input capture*
TCNT cleared by TGRD compare
match/input capture*
TCNT cleared by counter clearing for
another channel performing synchronous
clearing/synchronous operation*
TCNT clearing disabled
TCNT cleared by TGRA compare
match/input capture
TCNT cleared by TGRB compare
match/input capture
TCNT cleared by counter clearing for
another channel performing synchronous
clearing/synchronous operation*
Description
Description
2
2
1
1
1