DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 626

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

• Overview
1. When boot mode is used, the flash memory programming control program must be prepared in
2. When the boot program is activated, enumeration with respect to the host is carried out.
Rev.7.00 Dec. 24, 2008 Page 572 of 698
REJ09B0074-0700
Legend:
×: Don’t care
Note: * FWE pin and mode pin input must satisfy the mode programming setup time (t
self-powerd HUB
When a reset start preformed after the pins of this LSI have been set to boot mode, a boot
program incorporated in the microcomputer beforehand is activated, and the prepared
programming control program is transmitted sequentially to the host using the USB. With this
LSI, the programming control program received by the USB is written to a programming
control program area in on-chip RAM. After transfer is completed, control branches to the start
address of the programming control program area, and the programming control program
execution state is established (flash memory programming is performed). Figure 17.9 shows a
system configuration diagram when using USB boot mode.
Table 17.7 shows operations from reset release in USB boot mode until processing branches to
the programming control program.
the host beforehand. Prepare a programming control program in accordance with the
description in section 17.8, Flash Memory Programming/Erasing. In boot mode, if any data has
been programmed into the flash memory (if all data is not 1), all flash memory blocks are
erased. Boot mode is for use in enforced exit when user program mode is unavailable, such a
the first time on-board programming control program, or performed, or if the program
activated in user program mode is accidentally erased.
Enumeration information is shown in table 17.6. When enumeration is completed, transmit a
single H'55 byte from the host. If reception has not been preformed normally, restart boot mode
by means of a reset.
Host or
Figure 17.9 System Configuration Diagram when Using USB Boot Mode
D+
D-
Data transmission/reception
1.5kΩ
01×
Rs
Rs
0
1
USD+
USD-
EMLE
FWE*
MD2 to MD0*
P36
VBUS
USB
Flash memory
This LSI
On-chip RAM
MDS
EXTAL
UBPM
= 200ns) when a reset is released.
XTAL
1: Self power setting
0: Bus power setting
System clock:
16 MHz or 24MHz