DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 361

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

9.5.2
In synchronous operation, the values in a number of TCNT counters can be rewritten
simultaneously (synchronous presetting). Also, a number of TCNT counters can be cleared
simultaneously by making the appropriate setting in TCR (synchronous clearing). Synchronous
operation enables TGR to be incremented with respect to a single time base. Channels 0 to 2 can
all be designated for synchronous operation.
Example of Synchronous Operation Setting Procedure: Figure 9.14 shows an example of the
synchronous operation setting procedure.
[1]
[2]
[3]
[4]
[5]
<Synchronous presetting>
Synchronous Operation
Synchronous presetting
Synchronous operation
Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous
operation.
When the TCNT counter of any of the channels designated for synchronous operation is
written to, the same value is simultaneously written to the other TCNT counters.
Use bits CCLR2 to CCLR0 in TCR to specify TCNT clearing by input capture/output compare,
etc.
Use bits CCLR2 to CCLR0 in TCR to designate synchronous clearing for the counter clearing
source.
Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.
Set synchronous
Figure 9.14 Example of Synchronous Operation Setting Procedure
Set TCNT
operation
selection
[1]
[2]
Synchronous clearing
<Counter clearing>
source generation
clearing source
Select counter
Start count
channel?
Clearing
Yes
Rev.7.00 Dec. 24, 2008 Page 307 of 698
No
[3]
[5]
<Synchronous clearing>
Set synchronous
counter clearing
Start count
REJ09B0074-0700
[4]
[5]