DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 624

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
Table 17.4 Boot Mode Operation
Table 17.5 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate Is
Rev.7.00 Dec. 24, 2008 Page 570 of 698
REJ09B0074-0700
Item
Bit rate adjustment
Transmits number of
bytes (N) of programming
control program
Transmits 1-byte of
programming control
program (repeated for N
times)
Flash memory erase
Programming control
program execution
Host Bit Rate
19,200 bps
9,600 bps
4,800 bps
Possible
Host Operation
Continuously transmits data H'00
at specified bit rate
Transmits data H'55 when data
H'00 is received error-free
Transmits number of bytes (N) of
programming control program to
be transferred as 2-byte data (low-
order byte following high-order
byte)
Transmits 1-byte of programming
control program
System Clock Frequency Range of LSI
8 to 24 MHz
6 to 24 MHz
6 to 24 MHz
LSI Operation
Branches to boot program at reset-
start
Measures low-level period of
receive data H'00
Calculates bit rate and sets it in
BRR of SCI_2
Transmits data H'00 to host as
adjustment end indication
Transmits data H'AA to host when
data H'55 is received
Echobacks the 2-byte data received
as verification data
Echobacks received data to host
and also transfers it to RAM
Checks flash memory data, erases
all flash memory blocks in case of
written data existing, and transmits
data H'AA to host. (If erase could
not be done, transmits data H'FF to
host and aborts operation)
Branches to programming control
program transferred to on-chip RAM
and starts execution

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