DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 508

no-image

DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
13.3.2
IDCODE register is a 32-bit register. If INSTR is set to IDCODE mode, IDCODE is connected
between TDI and TDO. The HD64F2218, HD64F2218U, HD64F2218CU and HD64F2217CU
output fixed codes H'002A200F from the TDO. Serial data cannot be written to IDCODE register
through TDI. Table 13.3 shows the IDCODE register configuration.
Table 13.3 IDCODE Register Configuration
13.3.3
BYPASS is a 1-bit register. If INSTR is specified to BYPASS mode, CLAMP mode, or HIGHZ
mode, BYPASS is connected between TDI and TDO.
13.3.4
BSCAN is a 199-bit shift register assigned on the pins to control input/output pins.
The I/O pins consists of three bits (IN, Control, OUT), input pins 1 bit (IN), and output pins 1 bit
(OUT) of shift registers. The boundary scan test based on the JTAG standard can be performed by
using instructions listed in table 13.2. Table 13.4 shows the correspondence between the LSI pins
and boundary scan registers. (In table 13.4, Control indicates the high active pin. By specifying
Control to high, the pin is driven by OUT. ) Figure 13.2 shows the boundary scan register
configuration example.
Rev.7.00 Dec. 24, 2008 Page 454 of 698
REJ09B0074-0700
Bits
HD64F2218,
HD64F2218U,
HD64F2218CU and
HD64F2217CU codes
Contents
IDCODE Register (IDCODE)
BYPASS Register (BYPASS)
Boundary Scan Register (BSCANR)
31 to 28
0000
Version
(4 bits)
27 to 12
0000 0010 1010 0010
Part No.
(16 bits)
11 to 1
0000 0000 111
Product No.
(11 bits)
Fixed code
0
1
(1 bit)

Related parts for DF2211NP24V