DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 457

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

12.4
Figure 12.5 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by data (in LSB-first order), a parity bit (high or low level), and
finally stop bits (high level). In asynchronous serial communication, the transmission line is
usually held in the mark state (high level). The SCI monitors the transmission line. When the
transmission line goes to the space state (low level), the SCI recognizes a start bit and starts serial
communication. Inside the SCI, the transmitter and receiver are independent units, enabling full-
duplex. Both the transmitter and the receiver also have a double-buffered structure, so data can be
read from or written during transmission or reception, enabling continuous data transfer.
Serial
data
Operation in Asynchronous Mode
1
Start
bit
1 bit
0
Figure 12.5 Data Format in Asynchronous Communication
LSB
D0
(Example with 8-Bit Data, Parity, Two Stop Bits)
D1
One unit of transfer data (character or frame)
D2
Transmit/receive data
D3
7 or 8 bits
D4
D5
D6
Rev.7.00 Dec. 24, 2008 Page 403 of 698
MSB
D7
Parity
bit
1 bit,
or none
0/1
1
Stop bit
1 or
2 bits
1
REJ09B0074-0700
Idle state
(mark state)
1