DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 631

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
17.7
Making a setting in the RAM emulation register (RAMER) enables part of RAM to be overlapped
onto the flash memory area so that data to be written to flash memory can be emulated in RAM in
real time. Emulation can be performed in user mode or user program mode. Figure 17.11 shows
an example of emulation of real-time flash memory programming.
1. Set RAMER to overlap part of RAM onto the area for which real-time programming is
2. Emulation is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, thus releasing RAM
4. The data written in the overlapping RAM is written into the flash memory space (EB0).
required.
overlap.
Flash Memory Emulation in RAM
Figure 17.11 Flowchart for Flash Memory Emulation in RAM
No
Execute application program
Write tuning data to overlap
Start of emulation program
End of emulation program
Write to flash memory
emulation block
Clear RAMER
Set RAMER
Tuning OK?
RAM
Yes
Rev.7.00 Dec. 24, 2008 Page 577 of 698
REJ09B0074-0700

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