DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 517

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
13.5
1. When using the boundary scan function, clear TRST to 0 at power-on and after the t
2. The following must be noted on the power-on reset signal applied to the TRST pin.
3. TCK clock speed should be slower than system clock frequency.
4. In serial communication, data is input or output from the LSB as shown in figure 13.5.
has elapsed set TRST to 1 and set TCK, TMS, and TDI appropriately. During normal operation
when the boundary scan function is not used, set TCK, TMS, and TDI to Hi-Z, clear TRST to 0
at power-on, and after the t
pulled up internally, so care must be taken in standby mode because breakthrough current flow
can occur if there is a potential difference between the pin input voltage value when set to 1
and the power supply voltage Vcc.
• Reset signal must be applied at power-on.
• TRST must be separated in order not to affect the system operation.
• TRST must be separated from the system circuitry in order not to affect the system
• System circuitry must also be separated from the TRST in order not to affect TRST
operation.
operation as shown in figure 13.4.
Usage Notes
System
reset
TRST
Board edge pin
Figure 13.4 Recommended Reset Signal Design
Figure 13.5 Serial Data Input/Output
RESW
Boundary scan register
Power-on
reset circuit
time has elapsed set TRST to 1 or to Hi-Z. These pins are
TDI
TDO
Rev.7.00 Dec. 24, 2008 Page 463 of 698
Bit n
Bit n - 1
Bit 1
Bit 0
RES
TRST
LSI
REJ09B0074-0700
RESW
time

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