DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 627

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

3. Set the frequency for transmission from the host as a numeric value in units of MHz × 100 (ex:
4. In boot mode, the 4-kbyte on-chip RAM area H'FFE000 to H'FFEFBF is used by the boot
5. When a branch is made to the programming control program, the USB remains connected and
6. Boot mode is by means of a reset. Drive the reset pin low, wait for the elapse of at least 20
7. Do not change the input level of the mode pins while in boot mode. In the input level of a
8. Interrupt cannot be used during flash memory programming or erasing.
Note: * FWE pin and mode pin input must satisfy the mode programming set up time (t
16.00 MHz → H'0640, 24.00 MHz → H'0960).
program. The programming control program is transferred from the host stored in the 8-kbyte
area H'FFC000 to H'FFDFFF in the HD64F2218U, HD64F2218CU, HD64F2212U, and
HD64F2212CU and the 4-kbyte area H'FFD000 to H'FFDFFF in the HD64F2211U,
HD64F2211CU and HD64F2210CU. The boot program area cannot be used until program
execution switches to the programming control program. Also note that the boot program
remains in RAM even after control passes to the programming control program.
can be used immediately for transmission/reception of write data or verify data between the
programming control program and the host. The contents of CPU general registers are
undefined after a branch to the programming control program. Note, in particular, that since the
stack pointer is used implicitly in subroutine calls ad the like, it should be initialized at the start
of the programming control program.
states, then set the FWE pin and mode pins to release the reset.* Boot mode is also exited in
the event of a WDT overflow reset.
mode pin is changed (from low to high) during a reset, the states of ports with a dual function
as address output s, and bus control output signals (AS, RD, WR), will change due to switching
of the operating mode. Either make pin settings so that these pins do not become output signal
pins during a reset, or take precautions to prevent collisions with external signals.
200 ns) when a reset is released.
Rev.7.00 Dec. 24, 2008 Page 573 of 698
REJ09B0074-0700
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