DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 249

no-image

DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
Section 7 DMA Controller (DMAC)
Activation by USB Request: The USB request (DREQ signal) is specified as a DMAC activation
source. The USB request is generated by the level sense. In full-address normal mode, the USB
request is carried out as follows.
While the DREQ signal is kept high, the DMAC waits for the transfer request. While the DREQ
signal is kept low, the DMAC releases the bus each time a byte is transferred and the transfer is
performed continuously. When the DREQ signal is driven high during the transfer, the transfer is
halted and the DMAC waits for the transfer request.
Activation by Auto-Request: Auto-request activation is performed by register setting only, and
transfer continues to the end. With auto-request activation, cycle steal mode or burst mode can be
selected.
In cycle steal mode, the DMAC releases the bus to another bus master each time a byte or word is
transferred. DMA and CPU cycles usually alternate. In burst mode, the DMAC keeps possession
of the bus until the end of the transfer, and transfer is performed continuously.
Rev.7.00 Dec. 24, 2008 Page 195 of 698
REJ09B0074-0700

Related parts for DF2211NP24V