DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 239

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
Transfer requests (activation sources) consist of A/D conversion end interrupt, SCI transmission
complete and reception complete interrupts, and TPU channel 0 to 2 compare match/input capture
A interrupts. Figure 7.7 shows an example of the setting procedure for repeat mode.
Set number of transfers
and transfer destination
Set transfer source
Read DMABCRH
Read DMABCRL
Figure 7.7 Example of Repeat Mode Setting Procedure
Set DMABCRL
Repeat mode
Repeat mode
Set DMACR
addresses
setting
[1]
[2]
[3]
[4]
[5]
[6]
[1] Set each bit in DMABCRH.
[2] Set the transfer source address and transfer
[3] Set the number of transfers in ETCR.
[4] Set each bit in DMACR.
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
destination address in MAR and IOAR.
· Clear the FAE bit to 0 to select short address
· Specify enabling or disabling of internal interrupt
· Set the transfer data size with the DTSZ bit.
· Specify whether MAR is to be incremented or
· Set the RPE bit to 1.
· Specify the transfer direction with the DTDIR bit.
· Select the activation source with bits DTF3 to
· Clear the DTIE bit to 1.
· Set the DTE bit to 1 to enable transfer.
mode.
clearing with the DTA bit.
decremented with the DTID bit.
DTF0.
Rev.7.00 Dec. 24, 2008 Page 185 of 698
REJ09B0074-0700

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