DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 97

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
2.4.5
Reset exception handling loads the CPU's program counter (PC) from the vector table, clears the
trace bit in EXR to 0, and sets the interrupt mask bits in CCR and EXR to 1. The other CCR bits
and the general registers are not initialized. In particular, the stack pointer (ER7) is not initialized.
The stack pointer should therefore be initialized by an MOV.L instruction executed immediately
after a reset.
2.5
The H8S/2000 CPU can process 1-bit, 4-bit (BCD), 8-bit (byte), 16-bit (word), and 32-bit
(longword) data. Bit-manipulation instructions operate on 1-bit data by accessing bit n (n = 0, 1, 2,
…, 7) of byte operand data. The DAA and DAS decimal-adjust instructions treat byte data as two
digits of 4-bit BCD data.
2.5.1
Figure 2.9 shows the data formats in general registers.
Bit
1
0
Bit Name
V
C
Initial Register Values
Data Formats
General Register Data Formats
Initial Value
undefined
undefined
R/W Description
R/W Overflow Flag
R/W Carry Flag
Set to 1 when an arithmetic overflow occurs, and cleared to
0 at other times.
Set to 1 when a carry occurs, and cleared to 0 otherwise.
Used by:
They carry flag is also used as a bit accumulator by bit
manipulation instructions.
Add instructions, to indicate a carry
Subtract instructions, to indicate a carry
Shift and rotate instructions, to indicate a carry
Rev.7.00 Dec. 24, 2008 Page 43 of 698
REJ09B0074-0700

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