DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 398

no-image

DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
10.3.2
With WDT, the WOVF bit in RSTCSR is set to 1 if TCNT overflows in watchdog timer mode. If
TCNT overflows while the RSTE bit in RSTCSR is set to 1, an internal reset signal is generated
for the entire chip. This timing is illustrated in figure 10.3.
10.3.3
To use the WDT as an interval timer, clear bit WT/IT in TCSR to 0 and set bit TME to 1. When
the interval timer is operating, an interval timer interrupt (WOVI) is generated each time the
TCNT overflows. Therefore, an interrupt can be generated at intervals.
Rev.7.00 Dec. 24, 2008 Page 344 of 698
REJ09B0074-0700
Overflow signal
(internal signal)
Internal reset
signal
φ
WOVF
TCNT
Legend:
WOVI: Interval interrupt request generation
H'FF
H'00
Timing of Setting of Watchdog Timer Overflow Flag (WOVF)
Interval Timer Mode
TCNT count
WT/IT = 0
TME = 1
Figure 10.4 Operation in Interval Timer Mode
Figure 10.3 Timing of WOVF Setting
Overflow
WOVI
H'FF
Overflow
WOVI
Overflow
WOVI
518 states (WDT0)
H'00
Overflow
WOVI
Time

Related parts for DF2211NP24V