DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 651

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

Legend:
×: Don’t care
19.1.2
LPWRCR performs power-down mode control, selects sampling frequency for eliminating noise,
performs subclock oscillator control, and selects whether or not built-in feedback resistance and
duty adjustment circuit of the system clock generator used.
Bit
2
1
0
Bit
7
Bit Name Initial Value R/W
SCK2
SCK1
SCK0
Bit Name Initial Value R/W
DTON
Low Power Control Register (LPWRCR)
0
0
0
0
R/W
R/W
R/W
R/W
000: High-speed mode
001: Medium-speed clock is φ/2
010: Medium-speed clock is φ/4
011: Medium-speed clock is φ/8
100: Medium-speed clock is φ/16
101: Medium-speed clock is φ/32
11×: Setting prohibited
Description
System Clock Select 2 to 0
These bits select the bus master clock. To operate in
subactive mode or watch mode, clear the SCK2 to SCK0
bits to 0.
Description
Direct Transition ON Flag
0: When the SLEEP instruction is executed in high-speed
1: When the SLEEP instruction is executed in high-speed
mode or medium-speed mode, operation shifts to sleep
mode, software standby mode, or watch mode*.
When the SLEEP instruction is executed in subactive
mode, operation shifts to subsleep mode or watch mode.
mode or medium-speed mode, operation shifts directly to
subactive mode, or shifts to sleep mode or software
standby mode.
When the SLEEP instruction is executed in subactive
mode, operation shifts directly to high-speed mode, or
shifts to subsleep mode.
Rev.7.00 Dec. 24, 2008 Page 597 of 698
REJ09B0074-0700