DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 498

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
Rev.7.00 Dec. 24, 2008 Page 444 of 698
REJ09B0074-0700
TE bit
SCK output pin
TxD output pin
Figure 12.40 Port Pin State of Asynchronous Transmission Using Internal Clock
Figure 12.39 Sample Flowchart for Mode Transition during Transmission
Port input/output
Port
Read TEND flag in SSR
<Start of transmission>
Transition to software
standby mode, etc.
standby mode, etc.
Exit from software
operating mode?
<Transmission>
Yes
Yes
Yes
transmitted?
Initialization
TEND = 1
Change
All data
TE= 0
High output
[2]
Start of transmission
No
No
No
TE = 1
[1]
[3]
Start
SCI TxD output
[1]
[2]
[3]
Data being transmitted is interrupted.
After exiting software standby
mode, etc., normal CPU transmission
is possible by setting TE to 1, reading
SSR, writing TDR, and clearing TDRE
to 0.
If TIE and TEIE are set to 1, clear
them to 0 in the same way.
Includes module stop mode, watch mode,
subactive mode, and subsleep mode.
transmission
End of
Stop
to software
Transition
standby
Port input/output
Port input/output
Port
Exit from
software
standby
High output
SCI TxD
output

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