DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 221

no-image

DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
• Full Address Mode (DMACRB)
Bit Bit Name Initial Value R/W
10
to
8
Bit Bit Name Initial Value R/W
7
6
5
4
DAID
DAIDE
All 0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Reserved
Although these bits are readable/writable, only 0 should be
written to.
Reserved
Although this bit is readable/writable, only 0 should be written
to.
Destination Address Increment/Decrement
Destination Address Increment/Decrement Enable
These bits specify whether destination address register
MARB is to be incremented, decremented, or left unchanged,
when data transfer is performed.
00: MARB is fixed
01: MARB is incremented after a data transfer
10: MARB is fixed
11: MARB is decremented after a data transfer
Reserved
Although this bit is readable/writable, only 0 should be written
to.
Description
Description
When DTSZ = 0, MARB is incremented by 1 after a
transfer
When DTSZ = 1, MARB is incremented by 2 after a
transfer
When DTSZ = 0, MARB is decremented by 1 after a
transfer
When DTSZ = 1, MARB is decremented by 2 after a
transfer
Rev.7.00 Dec. 24, 2008 Page 167 of 698
REJ09B0074-0700

Related parts for DF2211NP24V