DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 185

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

6.5
The CPU is driven by a system clock (φ), denoted by the symbol φ. The period from one rising
edge of φ to the next is referred to as a "state." The memory cycle or bus cycle consists of one,
two, or three states. Different methods are used to access on-chip memory, on-chip peripheral
modules, and the external address space.
6.5.1
On-chip memory is accessed in one state. The data bus is 16 bits wide, permitting both byte and
word transfer instruction. Figure 6.4 shows the on-chip memory access cycle. Figure 6.5 shows the
pin states.
Basic Timing
On-Chip Memory (ROM, RAM) Access Timing
Internal address bus
Read
access
Write
access
φ
Figure 6.4 On-Chip Memory Access Cycle
Internal read signal
Internal data bus
Internal write signal
Internal data bus
Bus cycle
Address
T
Rev.7.00 Dec. 24, 2008 Page 131 of 698
1
Read data
Write data
REJ09B0074-0700