DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 144

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
4.8
When accessing word data or longword data, this LSI assumes that the lowest address bit is 0. The
stack should always be accessed by word transfer instruction or longword transfer instruction, and
the value of the stack pointer (SP: ER7) should always be kept even. Use the following
instructions to save registers:
Use the following instructions to restore registers:
Setting SP to an odd value may lead to a malfunction. Figure 4.4 shows an example of what
happens when the SP value is odd.
Rev.7.00 Dec. 24, 2008 Page 90 of 698
REJ09B0074-0700
PUSH.W Rn (or MOV.W Rn, @-SP)
PUSH.L ERn (or MOV.L ERn, @-SP)
POP.W Rn (or MOV.W @SP+, Rn)
POP.L ERn (or MOV.L @SP+, ERn)
SP
Note: This diagram illustrates an example in which the interrupt control mode is 0, in advanced mode.
Legend:
CCR:
PC:
R1L:
SP:
Notes on Use of the Stack
SP set to H'FFFEFF
Condition code register
Program counter
General register R1L
Stack pointer
Figure 4.4 Operation when SP Value Is Odd
SP
TRAPA instruction executed
Data saved above SP
CCR
PC
SP
MOV.B R1L, @-ER7 executed
Contents of CCR lost
R1L
PC
H'FFFEFA
H'FFFEFB
H'FFFEFC
H'FFFEFD
H'FFFEFE
H'FFFEFF
Address

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