DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 543

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

14.3.27 USB Test Register 0 (UTSTR0)
UTSTR0 controls the on-chip transceiver output signals. Setting the PTSTE bit to 1 after setting
UIFRST and UDCRST in UCTLR to 0 specifies the transceiver output signals (USD+ and USD-)
arbitrarily. Table 14.2 shows the relationship between UTSTR0 setting and pin output.
Bit
7
6 to 4 —
3
2
1
0
Bit Name
PTSTE
SUSPEND
OE
FSE0
VPO
Initial Value R/W
0
All 0
0
1
0
0
R/W
R
R/W
R/W
R/W
R/W
Description
Pin Test Enable
Enables the test control for the on-chip transceiver
output pins (USD+ and USD-) and USPND pin.
Reserved
These bits are always read as 0 and cannot be
modified.
On-Chip Transceiver Output Signal Setting
SUSPEND: Sets the USPND pin signal of the on-chip
OE:
FSE0:
VPO:
transceiver.
on-chip transceiver.
the on-chip transceiver.
chip transceiver.
Sets the single-ended 0 (FSE0) signal of
Sets the output enable (OE) signal of the
Sets the USD+ (VPO) signal of the on-
Rev.7.00 Dec. 24, 2008 Page 489 of 698
REJ09B0074-0700