DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 525

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
14.3.2
UDMAR is set when data transfer by means of a USB request of the on-chip DMAC is performed
for data registers UEDR1 and UEDR2 corresponding to EP1 and EP2 respectively used for Bulk
transfer. For the DMAC transfer, set DREQ0 and DREQ1 separately. If DREQ0 and DREQ1
usage overlaps, the USB cannot operate correctly. For details on DMAC transfer, refer to section
14.6, DMA Transfer Specifications.
Note: As the DREQ signal is not used in the data transfer by auto request of the on-chip DMAC,
Bit
7 to 4 —
3
2
1
0
Bit Name
EP2T1
EP2T0
EP1T1
EP1T0
set UDMAR to H'00.
USB DMAC Transfer Request Register (UDMAR)
Initial Value R/W
All 0
0
0
R
R/W
R/W
Description
Reserved
These bits are always read as 0 and cannot be
modified.
EP2 DMAC Transfer Request Select 1, 0
00: Does not request EP2 DMAC transfer
01: Reserved
10: Requests EP2 DMAC transfer by DREQ0
11: Requests EP2 DMAC transfer by DREQ1
EP1 DMAC Transfer Request Select 1, 0
00: Does not request EP1 DMAC transfer
01: Reserved
10: Requests EP1 DMAC transfer by DREQ0
11: Requests EP1 DMAC transfer by DREQ1
Rev.7.00 Dec. 24, 2008 Page 471 of 698
REJ09B0074-0700

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