DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 563

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
(3) Data Stage (Control-Out)
The firmware first analyzes the command data that is sent from the host in the setup stage, and
determines the subsequent data stage direction. If the result of command data analysis is that
the data stage is out-transfer, data from the host is waited for, and after data is received
(EP0oTS in UIFR0 is set to 1), data is read from the FIFO. Next, the firmware writes 1 to the
EP0o read complete bit, empties the receive FIFO, and waits for reception of the next data.
The end of the data stage is identified when the host transmits an IN token and the status stage
is entered.
(EP0oTS in UIFR0 = 1)
Receive data from host
Set EP0o receive
Receive OUT token
Receive OUT token
complete flag
to EP0sRDFN
to EP0oRDFN
USB function
in UTRG0?
in UTRG0?
1 written
1 written
Figure 14.14 Data Stage Operation (Control-Out)
Yes
Yes
ACK
No
No
NAK
NAK
EXIRQx
Rev.7.00 Dec. 24, 2008 Page 509 of 698
Read data from USB endpoint
Read data from USB endpoint
receive data size register 0o
(EP0oRDFN in UTRG0 = 1)
data register 0o (UEDR0o)
(EP0oTS in UIFR0 = 0)
Write 1 to EP0o read
Clear EP0o receive
complete flag
complete bit
Firmware
(UESZ0o)
REJ09B0074-0700

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